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NLAS4783 Triple SPDT 1.0 W RON Switch
The NLAS4783 is a triple independent ultra-low RON SPDT analog switch with ENABLE. This device is designed for low operating voltage, high current switching of speaker output for cell phone applications. It can switch a balanced stereo output. The NLAS4783 can handle a balanced microphone/speaker/ring-tone generator in a monophone mode. The device contains a break-before-make feature.
Features http://onsemi.com MARKING DIAGRAM
16 1 QFN-16 CASE 485AE 1
* * * * * * * *
1.65 to 3.6 V VCC Tiny 3 x 3 mm 16-Pin QFN Package Meets JEDEC MO-220 Specifications Low Static Power OVT on Logic Address and Enable Inputs This is a Pb-Free Device*
Typical Applications
Cell Phone Speaker/Microphone Switching Ringtone-Chip/Amplifier Switching Three Unbalanced (Single-Ended) Switches Stereo Balanced (Push-Pull) Switching
A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location)
PIN CONNECTIONS
Y0
16
Important Information
Y1
15
Vcc
14
* ESD Protection: * * * *
Human Body Model (HBM) > 8000 V Machine Model (MM) > 400 V Ringtone-Chip/Amplifier Switching Continuous Current Rating Through each Switch 300 mA Conforms to: JEDEC MO-220, Issue H, Variation VEED-6 Pin-for-Pin Compatible with MAX4783
Z1 Z Z0 ENABLE
1
2 3 4
5
6
NC GND
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2005
1
October, 2005 - Rev. 1
Publication Order Number: NLAS4783/D
CC CC
Y
13 7 8
* Single Supply Operation
NLAS 4783 ALYWG G
12
X X1 X0 A
11 10 9
C
B
NLAS4783
X, Y, or Z
X0, Y0, or Z0
ENABLE LOGIC A, B, or C X1, Y1, or Z1
Figure 1. Input Equivalent Circuit
PIN FUNCTION DESCRIPTION
QFN PIN # 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Symbol Y1 Y0 Z1 Z Z0 ENABLE NC GND C B A X0 X1 X Y VCC Analog Switch Y Normally Open Input Analog Switch Y Normally Closed Input Analog Switch Z Normally Open Input Analog Switch Z Output Analog Switch Z Normally Closed Input Digital Enable Input. Normally connect to GND. Drive to logic high to set all switches off. No Connection. Not internally connected. Ground Digital Address C Input Digital Address B Input Digital Address A Input Analog Switch X Normally Closed Input Analog Switch X Normally Open Input Analog Switch X Output Analog Switch Y Output Positive Analog and Digital Supply Voltage Input Description
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NLAS4783
TRUTH TABLE/SWITCH PROGRAMMING
Select Input Enable Input H L C X L B X L A X L All Switches Open X-X0 Y-Y0 Z-Z0 X-X1 Y-Y0 Z-Z0 X-X0 Y-Y1 Z-Z0 X-X1 Y-Y1 Z-Z0 X-X0 Y-Y0 Z-Z1 X-X1 Y-Y0 Z-Z1 X-X0 Y-Y1 Z-Z1 X-X1 Y-Y1 Z-Z1
L
L
L
H
L
L
H
L
L
L
H
H
L
H
L
L
L
H
L
H
L
H
H
L
L
H
H
H
1. Input and output pins are identical and interchangeable. Both pins can be considered input or output. Bidirectional signal pass.
MAXIMUM RATINGS
Symbol VCC VIS VIN Ianl1 Ianl-pk 1 Iclmp Positive DC Supply Voltage Analog Input Voltage (VNO, VNC, or VCOM) Digital Select Input Voltage Continuous DC Current from COM to NC/NO Peak Current from COM to NC/NO, 10 Duty Cycles (Note 2) Continuous DC Current into COM/NC/NO with Respect to VCC or GND Parameter Value *0.5 to )4.6 *0.5 to VCC *0.5 to )4.6 $300 $500 $100 Unit V V V mA mA mA
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 2. Defined as 10% ON, 90% off duty cycle.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIS VIN TA tr, tf Positive DC Supply Voltage Analog Input Voltage (VNO, VNC, or VCOM) Digital Select Input Voltage Operating Temperature Range Input Rise or Fall Time, SELECT VCC = 1.6-2.7 V VCC = 3.0-3.6 V Parameter Min 1.65 - - *40 - - Max 3.6 VCC VCC 85 20 10 Unit V V V C ns/V
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NLAS4783
DC CHARACTERISTICS - Digital Section (Voltages Referenced to GND)
Guaranteed Limit Symbol VIH VIL IIN IOFF ICC Parameter Minimum High-Level Input Voltage, Select Inputs Maximum Low-Level Input Voltage, Select Inputs Maximum Input Leakage Current, Select Inputs Power Off Leakage Current Maximum Quiescent Supply Current (Note 3) VIN = 3.6 V or GND VIN = 3.6 V or GND Select and VIS = VCC or GND Condition VCC 1.65 2.7-3.6 1.65 2.7-3.6 3.6 0 1.65 to 3.6 *405C to 255C 1.0 1.4 0.4 0.5 $ 0.1 $0.5 $ 1.0 t855C 1.0 1.4 0.4 0.5 $ 1.0 $2.0 $ 2.0 Unit V V mA mA mA
DC ELECTRICAL CHARACTERISTICS - Analog Section
Guaranteed Maximum Limit -405C to 255C Symbol RON Parameter NC/NO On-Resistance (Note 3) Condition VIN v VIL or VIN w VIH VIS = GND to VCC IINI v 100 mA ICOM = 100 mA VIS = 0 to VCC VIS = 1.3 V; ICOM = 100 mA VIN = VIL or VIH VNO or VNC = 0.3 V VCOM = 3.3 V VIN = VIL or VIH VNO 0.3 V or 3.3 V with VNC floating or VNC 0.3 V or 3.3 V with VNO floating VCOM = 0.3 V or 3.3 V VCC 2.7 - 3.6 Min Max 1.0 t855C Min Max 1.2 Unit W
RFLAT DRON INC(OFF) INO(OFF) ICOM(ON)
NC/NO On-Resistance Flatness (Notes 3, 5) On-Resistance Match Between Channels (Notes 3 and 4) NC or NO Off Leakage Current (Note 3)
2.7 - 3.6 2.7 - 3.6 3.6 -5.0
0.2 0.4 5.0 -10
0.2 0.6 10
W W nA
COM ON Leakage Current (Note 3)
3.6
-10
10
-100
100
nA
3. Guaranteed by design. Resistance measurements do not include test circuit or package resistance. 4. DRON = RON(MAX) - RON(MIN) between NC1 and NC2 or between NO1 and NO2. 5. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges.
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NLAS4783
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Guaranteed Maximum Limit VCC (V) 2.3 - 3.6 2.3 - 3.6 VIS (V) 1.5 1.5 *405C to 255C Min Typ* Max 25 15 t855C Min Max 27 20 Unit ns ns ns 3.0 1.5 2.0 8.0
Symbol tON tOFF tBBM
Parameter Turn-On Time Turn-Off Time Minimum Break-Before-Make Time
Test Conditions RL = 50 W, CL = 35 pF (Figures 3 and 4) RL = 50 W, CL = 35 pF (Figures 3 and 4) VIS = 3.0 RL = 300 W, CL = 35 pF (Figure 2)
Typical @ 25, VCC = 3.6 V CIN CSN CD Control Pin Input Capacitance SN Port Capacitance D Port Capacitance When Switch is Enabled 2.5 75 240 pF pF pF
*Typical Characteristics are at 25C.
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
Symbol BW Parameter Maximum On-Channel -3dB Bandwidth or Minimum Frequency Response Maximum Feed-through On Loss Off-Channel Isolation Charge Injection Select Input to Common I/O Total Harmonic Distortion THD + Noise Channel-to-Channel Crosstalk Condition VIN centered between VCC and GND (Figure 5) VIN = 0 dBm @ 100 kHz to 50 MHz VIN centered between VCC and GND (Figure 5) f = 100 kHz; VIS = 1 V RMS; CL = 5 nF VIN centered between VCC and GND(Figure 5) (Note 6) VIN = VCC to GND, RIS = 0 W, CL = 1 nF Q = CL x DVOUT (Figure 6) FIS = 20 Hz to 20 kHz, RL = Rgen = 600 W, CL = 50 pF VIS = 2 V RMS f = 100 kHz; VIS = 1 V RMS, CL = 5 pF, RL = 50 W VIN centered between VCC and GND (Figure 5) VCC (V) 1.65 - 3.6 255C Typical 17 Unit MHz
VONL VISO Q THD VCT
1.65 - 3.6 1.65 - 3.6 1.65 - 3.6 3.0 1.65 - 3.6
-0.10 -62 50 0.015 -62
dB dB pC % dB
6. Off-Channel Isolation = 20log10 (Vcom/Vno), Vcom = output, Vno = input to off switch.
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NLAS4783
DUT VCC 0.1 mF 50 W Output VOUT 35 pF 90% Output Input GND tBMM 90% of VOH VCC
Switch Select Pin GND
Figure 2. tBBM (Time Break-Before-Make)
VCC DUT VCC 0.1 mF Open Output VOUT 50 W 35 pF Output VOL Input tON tOFF Input 0V VOH 90% 90% 50% 50%
Figure 3. tON/tOFF
VCC DUT Output Open 50 W VOUT 35 pF Input
VCC 50% 0V VOH Output VOL 10% 10% 50%
Input
tOFF
tON
Figure 4. tON/tOFF
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NLAS4783
50 W Reference Input Output 50 W Generator 50 W DUT Transmitted
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. VISO = Off Channel Isolation = 20 Log VONL = On Channel Loss = 20 Log VOUT VIN for VIN at 100 kHz
VOUT VIN
for VIN at 100 kHz to 50 MHz
Bandwidth (BW) = the frequency 3 dB below VONL VCT = Use VISO setup and test to all other switch analog input/outputs terminated with 50 W
Figure 5. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL
DUT Open Output VIN
VCC GND CL Output Off Off DVOUT
VIN
On
Figure 6. Charge Injection: (Q)
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NLAS4783
3.5 3.0 1.65 V 2.5 RON (W) 2.0 1.5 2.7 V 1.0 0.5 3.0 V 0 0.0 0.5 1.0 1.5 2.0 2.5 VIN (V) 3.0 3.5 4.0 4.5 5.0 0 0.0 0.5 1.0 1.5 VIN (V) 2.0 2.5 3.0 3.6 V RON (W) 1.2 85C 1.0 0.8 0.6 0.4 0.2 25C -40C
Figure 7. On-Resistance vs. Input Voltage
Figure 8. RON vs. VIN vs. Temperature @ VCC = 3.0 V
1.2 85C 1.0 25C 0.8 RON (W) 0.6 0.4 0.2 0.0 0.0 -40C
0.016 0.014 0.012 THD (%) 0.010 0.008 0.006 0.004 0.002 0.5 1.0 1.5 2.0 VIN (V) 2.5 3.0 3.5 4.0 0.000 10 85C 100 1000 FREQUENCY (Hz) 10000 100000 25C -40C
Figure 9. RON vs. VIN vs. Temperature @ VCC = 3.6 V
Figure 10. Total Harmonic Distortion vs. Frequency
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NLAS4783
ORDERING INFORMATION
Device Nomenclature Device Order Number NLAS4783MN1R2G Circuit Indicator NL Technology AS Device Function 4783 Tape & Reel Suffix R2 Package Type QFN (Pb-Free) Tape & Reel Size 3000 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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NLAS4783
PACKAGE DIMENSIONS
QFN-16 (3 x 3 x 0.85 mm) CASE 485AE-01 ISSUE O
D A B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 5. OUTLINE MEETS JEDEC DIMENSIONS PER MO-220, VARIATION VEED-6. DIM A A1 A3 b D D2 E E2 e K L SEATING PLANE MILLIMETERS MIN NOM MAX 0.800 0.900 1.000 0.000 0.025 0.050 0.200 REF 0.180 0.250 0.300 3.00 BSC 1.250 1.40 1.550 3.00 BSC 1.250 1.40 1.550 0.500 BSC 0.200 --- --- 0.300 0.400 0.500
PIN 1 LOCATION
0.15 C 0.15 C 0.10 C TOP VIEW
16 X
0.08 C SIDE VIEW A1 C
16X
L
5 8
NOTE 5 4
16X
K
1 12
16X
b BOTTOM VIEW
0.10 C A B 0.05 C
NOTE 3
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: N. American Technical Support: 800-282-9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Phone: 81-3-5773-3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
CC CC
(A3) D2 e
9 16 13
E
A
EXPOSED PAD
E2
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NLAS4783/D

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